If PHY-to-rj45 (HR9111) connection is correct, need to check also +1.2V power.
Probably, in your design EPHY_VDD is not separate power, shared with CPU_VDD.
On heavy core loading, CPU_VDD peak current is up to 0.5A and more.
It may be make unstable +1.2V voltage.
Is ethernet work normal, when cpu loaded without network operations:
stress test, compressing big file, etc... ?